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FA5502P/M
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FUJI Power Supply Control IC
Power Factor Correction
FA5502P/M
Application Note
June 02 Fuji Electric Co., Ltd. Matsumoto Factory
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FA5502P/M
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WARNING
1.This Data Book contains the product specifications, characteristics, data, materials, and structures as of June 2002. The contents are subject to change without notice for specification changes or other reasons. When using a product listed in this Data Book, be sure to obtain the latest specifications. 2. All applications described in this Data Book exemplify the use of Fuji's products for your reference only. No right or license, either express or implied, under any patent, copyright, trade secret or other intellectual property right owned by Fuji Electric Co., Ltd. is (or shall be deemed) granted. Fuji makes no representation or warranty, whether express or implied, relating to the infringement or alleged infringement of other's intellectual property rights which may arise from the use of the applications described herein. 3. Although Fuji Electric is enhancing product quality and reliability, a small percentage of semiconductor products may become faulty. When using Fuji Electric semiconductor products in your equipment, you are requested to take adequate safety measures to prevent the equipment from causing a physical injury, fire, or other problem if any of the products become faulty. It is recommended to make your design fail-safe, flame retardant, and free of malfunction. 4.The products introduced in this Data Book are intended for use in the following electronic and electrical equipment which has normal reliability requirements. * Computers * OA equipment * Communications equipment (terminal devices) * Measurement equipment * Machine tools * Audiovisual equipment * Electrical home appliances * Personal equipment * Industrial robots, etc. 5.If you need to use a product in this Data Book for equipment requiring higher reliability than normal, such as for the equipment listed below, it is imperative to contact Fuji Electric to obtain prior approval. When using these products for such equipment, take adequate measures such as a backup system to prevent the equipment from malfunctioning even if a Fuji's product incorporated in the equipment becomes faulty. * Transportation equipment (mounted on cars and ships) * Trunk communications equipment * Traffic-signal control equipment * Gas leakage detectors with an auto-shut-off feature * Emergency equipment for responding to disasters and anti-burglary devices * Safety devices 6. Do not use products in this Data Book for the equipment requiring strict reliability such as (without limitation) * Space equipment * Aeronautic equipment * Atomic control equipment * Submarine repeater equipment * Medical equipment 7. Copyright (c) 1995 by Fuji Electric Co., Ltd. All rights reserved. No part of this Data Book may be reproduced in any form or by any means without the express permission of Fuji Electric. 8. If you have any question about any portion in this Data Book, ask Fuji Electric or its sales agents before using the product. Neither Fuji nor its agents shall be liable for any injury caused by any use of the products not in accordance with instructions set forth herein.
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CONTENTS
page 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. Description Features Outline Block diagram Pin assignment Ratings and characteristics Characteristic curves Description of each circuit Design advice Example of application circuit *************** *************** *************** *************** *************** *************** *************** *************** *************** *************** 4 4 4 5 5 6 9 13 18 23
Note
* Parts tolerance and characteristics are not defined in all application described in this Data book. When design an actual circuit for a product, you must determine parts tolerances and characteristics for safe and economical operation.
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FA5502P/M
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1. Description
FA5502P/M is a control IC for a power factor correction system. This IC uses a CMOS device with high dielectric strength (30V) to implement low power consumption. This IC uses the average current control system to ensure stable operation. With this system, a power factor of 99% or better can be achieved.
2. Features
* * * * * * * * * * Low current consumption by CMOS process Stand-by : 3A(max), Start-up : 30A(max), Operating : 4mA(typ) Good regulation of PFC output voltage from no-load to full-load Drive circuit for connecting a power MOSFET(IOUT = 1.5A) Pulse-by-pulse overcurrent and overvoltage limiting function 2% accuracy reference voltage for setting DC output and overvoltage protection Output ON/OFF control function by external signal External synchronizing input pin for synchronous operation with other circuits Undervoltage lockout function (ON:16.5V, OFF:8.9V) 16-pin package (DIP/SOP)
3. Outline
DIP-16 (FA5502P) SOP-16 (FA5502M)
16
9
0.15 0.05
6.5 0.2
16
9
5. 3 0. 1
1
8
19.4 0.3 3.4 0.1
1.5 0.3
1
8
10.2 0.1 7.3 0.5 1. 80 0. 05
7. 8 0. 2
10
-0
2.54 TYP
0.5 0.1 17.78 0.3
0.3
0.1
0.08
7.6 0.2
0 - 15
1.27
0.40 0.05
4
0. 10 0. 10
4.0 0.3
0. 75 0. 1
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CT(15) CS(11) REF(13) VCC(10) ON/OFF(12)
4. Block diagram
SYNC (14)
ON/OFF OSC 11A UVLO 16.5V/8.9V 5V REF 3.95V/ 2.8V
VC (9) OUT (8) 1.55V 11k MUL OVP.COMP Q 1.64V GND (7)
PWM.COMP 15k 4.85k R S S OCP.COMP + CUR.AMP ER.AMP + 1.55V
VIN(6) VFB (5)
0.39V
IDET(16)
IFB(1)
IIN-(2)
VDET(3)
OVP (4)
5. Pin assignment
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol IFB IINVDET OVP VFB VINGND OUT VC VCC CS ON/OFF REF SYNC CT IDET Current output Function error amplifier Description Output of current error amplifier to connect compensation network Inverting input of current error amplifier to connect compensation network Input of multiplier to detect sinusoidal waveform Input to overvoltage protection circuit Output of voltage error amplifier to connect compensation network Inverting input to voltage error amplifier to detect PFC output voltage Ground Output for direct driving a power MOSFET Power supply to output circuit Power supply for IC A pin to connect a capacitor for soft-start Input of ON/OFF control circuit Reference voltage output Input of synchronization signal A pin to connect timing capacitor and resistor to set oscillation frequency Input of inductor current signal
Inverting input to current error amplifier Multiplier input Overvoltage protection input Voltage error amplifier output Inverting input to voltage error amplifier Ground Output Power supply to output circuit Power Supply Soft-start Output ON/OFF control input Reference voltage Oscillator synchronization input Oscillator timing capacitor and resistor Non-inverting input current error amplifier to
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6. Ratings and characteristics
The contents are subject to change without notice. When using a product, be sure to obtain the latest specifications.
(1) Absolute maximum ratings
Item Supply Voltage VC pin Symbol VC VCC1 VCC2 IOUT VSYNC VVINVVDET VOVP VIDET VON/OFF IREF Pd Rating Vcc 30 Self Limiting 1.5 -0.3 to 5.0 Unit V V V A V
VCC pin Low impedance source (Icc>15mA) VCC pin Internal zener clamp voltage (Icc<15mA) Output peak current SYNC,VIN-,VDET and OVP pins Input voltage IDET pin input voltage ON/OFF pin input voltage REF pin source current Power dissipation (Ta=25C) DIP-16 SOP-16
-10 to 5.0 -0.3 to Vcc
V V
-10 mA 850 mW 650 mW Ambiance temperature Ta -30 to +105 C Maximum junction temperature Tj +150 C Storage temperature Tstg -40 to +150 C Note) VC and ON/OFF pins voltage must be less than or equal to VCC pin voltage in all the conditions. Peak current at OUT pin may flow to rated value neither according to supply voltage nor temperature conditions. Ma xim um diss ipation curve
650mW(SOP) 850mW(DIP)
Maximum power dissipation -30
25 105 Ambience temperature Ta(C)
150
(2) Recommended operating conditions
Item Supply voltage IDET pin input voltage VDET pin input voltage VDET pin peak input voltage Oscillation frequency Oscillation timing capacitance Oscillation timing resistance Noise filter resistance connected to IDET pin REF-GND capacitance Note) If the sync hronous operation is not Symbol Vcc,Vc VIDET VVDET VPVDET fOSC CT RT Rn MIN 10 -1.0 0 0.65 15 330 10 0 TYP. MAX 28 0 2.4 2.4 150 1000 75 27 Unit V V V V kHz pF k
Cref 0.1 0.47 F neces sary, connec t the SYNC pin to GND.
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(3) Electrical Characteristics (Unless otherwise specified, Vcc=Vc=18V, Ta=25C, CT=470pF, RT=22k)
Reference voltage section Item Output voltage Line regulation Load regulation Temperature stability Oscillator section Item Oscillation frequency Voltage stability Temperature stability Output peak voltage Synchronizing input threshold voltage SYNC pin input current
(REF pin) Symbol VREF Vrdv Vrdi VrdT
Condition Vcc=10 to 28V ILoad=0.1 to 2mA Ta=-30 to 105C
MIN 4.8 -50
TYP 5 -25 0.5
MAX 5.2 25
Unit V mV mV mV/C
(CT, SYNC pin) Symbol fOSC fdv fdT VOSC VTHSYNC ISYNC
Condition CT=470pF, RT=22k, Ta=25C Vcc=10 to 28V Ta=-30 to +105C SYNC pin voltage SYNC pin=2V (OUT pin) Condition
MIN 71
TYP 78 1 0.04 3.4
MAX 85 3 0.07 2.0 175
Unit kHz % %/C V V A
1.0 75
1.5 125
Pulse width modulation circuit section Item Symbol Maximum duty cycle DMAX
MIN 91
TYP 94
MAX 97
Unit %
Overcurrent limiter circuit section (IDET pin) Item Symbol Condition Input threshold voltage VTHOCP IDET pin voltage Delay time TpdOCP Soft start circuit section Item Charge current Input threshold voltage (CS pin) Symbol ICHG VTHCS0 VTHCSM
MIN -1.20
TYP -1.10 150
MAX -1.00
Unit V ns
Condition CS pin=0V Dutycycle=0% Dutycycle=DMAX (ON/OFF pin) Condition ON/OFF pin=VTHON OFFON ONOFF
MIN
TYP -11 0.34 3.40
MAX
Unit A V V
Output ON/OFF control circuit section Item Symbol On-state input current ITHON VTHON ON/OFF control threshold voltage VTHOFF
MIN 3.55 2.40
TYP 3.95 2.80
MAX 500 4.35 3.20
Unit nA V V
Voltage error amplifier section (VIN-, VFB pin) Item Symbol Condition Reference voltage Vr Line regulation Vredv Vcc=10 to 28V Temperature stability VredT Ta=-30 to 105C Input bias current IBE Open loop gain Ave VOE+ No load Output voltage VOENo load Output source current IOE+ VFB pin=0V Output sink current IOEVFB pin=2V
MIN 1.519
TYP 1.550 0.5 0.2
MAX 1.581
500 60 3.7 4.1 50 -2.8 280
200
Unit V mV mV/C nA dB V mV mA A
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FA5502P/M Current error amplifier section (IIN-, IFB, IDET pin) Item Symbol Condition VDET pin=0V Input threshold voltage VTHIDET VFB pin=Vr Rn=30 Input bias current IBC IDET pin=0V Open loop gain Avc VOC+ No load Output voltage No load VOCOutput source current IOC+ IFB pin=0V Output sink current IOCIFB pin=2V
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MIN -50 -350 60 3.55 TYP 0 -250 3.8 50 -5.1 800 MAX 50 -150 Unit mV A dB V mV mA A
200
Multiplier section (VDET, IIN-, VFB pin) Item Symbol Condition VDET pin input voltage VMVDET VFB pin input voltage VMVFB Input bias current IBVDET VDET pin=0V Output current IM IIN- pin=0V Output voltage factor K Overvoltage protection circuit section Item Symbol Input threshold voltage VTHOVP VTHOVP/Vr ratio Input bias current Delay time IBOVP Tpdovp OVP pin=0V (OVP pin) Condition OVP pin voltage
MIN 0 1.5 -1.5
TYP
MAX 2.4 3.5
-0.5 -44 -1.2
Unit V V A A -
MIN 1.607 1.037 -1.0
TYP 1.640 1.058 -0.3 150
MAX 1.673 1.079
Unit V A ns
Undervoltage lockout circuit section Item Symbol
(VCC pin) Condition
MIN 15.5 8.2 6.8
TYP 16.5 8.9 7.6
MAX 17.5 9.6 8.4
Unit V V V
Start-up threshold voltage Shutdown threshold voltage
Hysteresis voltage Output circuit section Item Low output voltage High output voltage Rise time Fall time
VTHUON VTHUOFF VUHYS (OUT, VC pin) Symbol VOL VOH tr tf
Condition IOL=100mA IOH=-100mA, Vcc=18V No load No load
MIN 15.5
TYP 0.5 16.5 50 50
MAX 1.0
Unit V V ns ns
Power supply current (VCC pin) Item Symbol Stand-by current ICCST Starting-up current ICCSTA Operating-state supply ICCOP current OFF-state supply current ICCOFF
Condition Vcc=14V Vcc=start threshold No load ON/OFF pin=0V
MIN
TYP 10 4 80
MAX 3 30 6 200
Unit A A mA A
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7. Characteristic curves
(Unless otherwise specified, Vcc=Vc=18V, Ta=25C, CT=470pF, RT=22k)
Oscillation frequency (fosc) vs. timing resistor (R T)
78.4
100
Oscillation frequency(fosc) vs. supply voltage(Vcc)
78.2 fosc (kHz) 78.0 77.8 77.6 77.4
100 RT (k )
fosc(kHz)
CT=330pF CT=470pF CT=680pF
10 10
CT=1000pF
10
15
20 Vcc (V)
25
30
80 79 fosc (kHz) 78 77 76 75 -50
Oscillation frequency(fosc) vs. junction temperature(Tj) 100 98 96 DMAX (%) 94 92 90 88 86 0 50 Tj (C) 100 150 84 10
Maximum duty cycle(DMAX) vs. timing resistor(RT)
CT=330pF to 1000pF RT (k) 100
95 94 DMAX (%) 93 92 91 90 -50
Maximum duty cycle(DMAX) vs. Junction temperature(Tj) 100 90 80 70 60 50 40 30 20 10 0 0
Output duty cycle(D) vs. CS pin voltage(VCS)
0
50 Tj (C)
100
150
D (%)
1
2 VCS (V)
3
4
5
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Multiplier input voltage(VVDET) vs. output voltage(VIIN-) VVFB=1.1V VVFB=0.5V IDET pin voltage(VIDET) vs. IIN- pin voltage(VIIN-) 0.0 (Normal operation)
1.4 1.2 VIIN-(V) 1.0 0.8 0.6 0.4 0.2 0.0 0 1 VVDET (V) 2 3 VVFB=1.5V VVFB=1.7V VVFB=2.9V VVFB=2.4V VVFB=2.1V VVFB=1.9V VIDET(V)
-0.5
-1.0
-1.5 0 0.5 VIIN- (V) 1 1.5
Voltage error amplifier reference voltage(Vr) vs. supply voltage(Vcc) 1.554 1.552 Vr (V) Vr (V) 10 15 20 Vcc (V) 25 30 1.550 1.548 1.546 1.544 1.56
Voltage error amplifier reference voltage(Vr) vs. junction temperature(Tj)
1.55 1.54
1.53 1.52 -50 0 50 Tj (C) 100 150
OVP input threshold voltage(VTHOVP) vs. junction temperature(Tj) 1.66 1.65 VTHOVP(V) 1.64 1.63 1.62 1.61 -50 0 50 Tj (C) 100 150 VTHOCP(V) -1.07 -1.08 -1.09 -1.10 -1.11 -1.12 -50
OCP input threshold voltage(VTHOCP) vs. junction temperature(Tj)
0
50 Tj (C)
100
150
10
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ON/OFF control circuit OFF threshold voltage(VTHOFF) vs. junction temperature(Tj)
ON/OFF control circuit ON threshold voltage(VTHON) vs. junction temperature(Tj) 4.5 4.0 VTHON(V) VTHOFF(V) 3.5 3.0 2.5 2.0 -50 0 50 Tj (C) 100 150
3.5 3.0 2.5 2.0 1.5 1.0
-50
0
50 Tj (C)
100
150
L-level output voltage(VOL) vs. supply voltage(Vcc) 0.35 0.30 Vcc-VOH (V) 0.25 VOL (V) 0.20 0.15 0.10 0.05 0.00 10 15 20 Vcc (V) 25 30 IOL=100mA 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 10
H-level output voltage(VOH) vs. supply voltage(Vcc) IOH=-100mA
15
20 Vcc (V)
25
30
UVLO startup threshold voltage(VTHUON) vs. junction temperature(Tj) 17.0 16.8 VTHUON(V) 16.6 16.4 16.2 16.0 -50 0 50 Tj (C) 100 150 VTHUOFF(V)
UVLO shutdown threshold voltage(VTHUOFF) vs. junction temperature(Tj) 9.00 8.95 8.90 8.85 8.80 -50 0 50 Tj (C) 100 150
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Supply current(Icc) vs. supply voltage(Vcc) Supply current(Icc) vs. supply voltage(Vcc) (enlarged) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 ON/OFF pin: pull up to Vcc
16 14 12 Icc (mA) 10 8 6 4 2 0 0 10 20 Vcc (V) 30 40 ON/OFF pin: pull up to Vcc
Icc (mA)
10
20 Vcc (V)
30
40
Operating-state supply current(Iccop) vs. junction temperature(Tj) 4.5 4.0 3.5 Iccop (mA) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -50 0 50 Tj (C) 100 150
700 600 500 ICCOFF(A)
OFF-state supply current(ICCOFF) vs. supply voltage(Vcc)
250 200 ICCOFF(A) 150 100 50 0
OFF-state supply current(ICCOFF) vs. supply voltage(Vcc) (enlarged)
400 300 200 100 0 10 15 20 Vcc (V) 25 30
10
15
20 Vcc (V)
25
30
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8. Description of each circuit
(1) Oscillator section
The oscillator generates sawtooth waveform between 0.3V and 3.4V by charging and discharging capacitor. Fig.1 shows the connection. The oscillation frequency is determined by CT and RT. (see characteristics curve). The oscillator waveform is input to the PWM comparator. The oscillator is also used for determining the maximum duty cycle of output pulses. Concretely, a signal is sent to the output circuit section and the OUT pin is forced to be Low level during the CT discharge period (fall time of CT pin voltage).
CT pin voltage
13
Rsy synchronizing signal
Csy
OSC
14
SYNC 16k
SYNC pin signal
D2
VSYNC =1.5V(typ)
Fig.2 SYNC pin circuit (1)
REF
3.4V
less than 5V SYNC pin voltage 2V
SYNC pin voltage waveform
RT CT
15
CT
more than 50ns
OSC
0.3V
0
Dmax
t
Dead time
1V
less than 200ns
Fig.1 Oscillator circuit SYNC pin (pin 14) is a synchronizing signal input pin. It is usable for synchronized operation. When it is desired to adopt synchronized operation, the free-running frequency (determined by CT and RT) must be set about 10% lower than that of external synchronizing signal. The input resistance in SYNC pin is approximately 16k. Usually, a square-wave synchronizing signal is differentiated by R and C, and the voltage input to SYNC pin is so arranged to be below 1V within CT discharge period. Concretely, the waveform must satisfy the condition in Fig.3. Depending on the amplitude, etc. of square-wave signal used as external synchronizing signal, the RC differentiating circuit shown in Fig.2 could not generate a waveform in Fig.3. In such a case, add a resistor between SYNC pin and GND so as to clear the condition in Fig.3. Fig.5 shows timing chart of synchronized operation. Note that diode D2 in Fig.2 is required so that no negative voltage will be applied to SYNC pin while in the discharge period of capacitor Csy in the differentiating circuit. Considering the rated voltage of SYNC pin, use a Schottky diode of a low forward voltage. Unless the external synchronization function is used, connect SYNC pin to GND pin to avoid a malfunction.
0
t
Fig.3 Condition for SYNC pin signal
Rsy synchronizing signal
Csy R14
OSC
14
SYNC
16k
D2 Fig.4 SYNC pin circuit (2)
CT pin voltage t Synchronizing signal t SYNC pin voltage t OUT pin voltage t
Fig.5 Timing chart of synchronized operation
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(3) Current error amplifier and overcurrent limiter circuit
CUR.AMP is an error amplifier which constitutes a current loop to control the line current to a sinusoidal waveform. As shown in Fig.7, to IIN- pin (pin 2), a multiplier output is connected via resistor RA as a current reference signal. Inductor current is monitored by IDET pin (pin 16). The IDET pin should be used within the voltage range from 0V to -1.0V in normal operation. RC network for loop compensation is connected between IFB pin and IIN- pin. According to the circuit in Fig.7, the characteristics of voltage gain AV are as shown in Fig.8. Where, Z= 1 * * * * * (5) 2R5 x C3 1 2R5 x C C= C2 x C3 * * * * * (6) C2 + C3
(2) Voltage error amplifier and overvoltage limiting circuit
ER.AMP is an error amplifier which constitutes a voltage feedback loop for keeping the output voltage constant. The non-inverting input is internally connected to reference voltage Vr of 1.55V (typ.). Fig.6 shows the connection. The output voltage is determined by: VO = R1 + R2 x Vr * * * * * (1) R1
The error amplifier output is pinned out at VFB pin (pin 5). Between VFB pin and VIN- pin, RC network are connected for loop compensation. The voltage gain Av is expressed by AV = R4 * * * * * (2) R3(1 + jC1x R 4 )
P=
Cutoff frequency fc is expressed by: fC = 1 * * * * * (3) 2C1x R 4
Voltage gain (G1) between Z and P (gain between IDET pin and IFB pin) in Fig.8 is: R5 G1 = 20 log 0.75 + 1 * * * * * (7) RA Select C2 and C3 so that P/Z will be about 10 for adequate phase margin. The output of current error amplifier is input to PWM comparator. The optimum value of loop compensation should be determined by evaluation in actual circuit referring to application circuit, etc. To limit the overcurrent, overcurrent limiting comparator OCP.COMP is provided. The threshold voltage at IDET pin is -1.10V (typ.). If a noise is picked up at IDET pin, suppress it by connecting Rn and Cn. Rn must be lower than 27 . MUL R5
1
If 100Hz or 120Hz ripples appear at the error amplifier output, the PFC converter will not operate stably. Therefore, determine C1 and R4 so that voltage gain Av at 100 Hz or 120 Hz will be small enough. Also set fc to approximately 1Hz to ensure a stable operation. Practically, the optimum value should be determined by evaluation in the actual circuit. To limit the output voltage when it has risen above the normal voltage, overvoltage limiting comparator OVP.COMP is incorporated. Its threshold voltage Vp is as follows: VP = x Vr (=1.058(typ)) * * * * * (4) According to the connection in Fig.6, therefore, the output overvoltage is limited to 1.058 times (typ.) the normal output voltage.
Vo C1 R2 R4
6 5
IFB RA 11k
Vm
VFB
C3 C2
VIN- ER.AMP MUL Vr =1.55V(typ.) OVP OVP.COMP F.F. Vp =1.058Vr(typ.)
currnet detection
2
IIN-
CUR.AMP PWM comparator
R3 R1
16
IDET RC 4.85k
RB 15k
REF 5V
Rn
Cn
OCP.COMP F.F. 0.39V
4
Fig.7 Current error amplifier and overcurrent limiting circuit
Fig.6 Voltage error amplifier and overvoltage limiting circuit
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Normal operation VIFB VCT
voltage gain[dB]
G1
VCS
t
Z
P
frequency
OUT pin t Operation with Dmax
Fig.8 Voltage gain of CUR.AMP
(4) PWM comparator
Fig.9 shows the configuration of PWM comparator. Oscillator output VCT and current error amplifier output VIFB are compared. While VCT < VIFB, PWM comparator output goes High and OUT pin also goes High. Note that, during the oscillator discharge period, OUT pin is forced to be Low, thereby determining the maximum duty cycle. (see characteristics curve). CS pin (pin 11) is a soft start pin. When start up, an internal constant current (11A (typ.)) charges capacitor C4 for soft start. Priority is given to VCS or VIFB whichever is lower. Fig.10 shows PWM comparator timing chart.
VCS VIFB VCT t OUT pin t
Fig.10 PWM comparator timing chart
(5) Multiplier
The multiplier generates a current reference signal. The rectified line voltage is divided down by resistor and monitored by VDET pin (pin 3). Considering the dynamic range of multiplier, design the R6 and R7 in Fig.11 so that the peak voltage at VDET pin within a range from 0.65V to 2.4V over the entire range of line voltage. VFB pin is normally above 1.55V and, at this status, multiplier output voltage Vm is approximately expressed by: Vm = 1.25 - K x ( VVFB - 1.55) x VVDET * * * * * (8) Where K: Output voltage factor (multiplier section) When VFB pin is lower than 1.55V, compensation circuit for light load operates. As shown in Fig.7, Vm is applied via a resistor of 11 k to inverting input (IIN-) of current error amplifier CUR. AMP. (For input/output characteristics of multiplier, see characteristics curve.)
VIFB
CS
11
VCS
CUR.AMP output (IFB pin) VCT Oscillator output (CT pin) Output circuit PWM.COMP
C4
7.5V 11A
Fig.9 PWM comparator circuit
VIN VVFB R7
3
ER.AMP output (VFB pin) Vm
VDET VVDET
MUL
R6
Fig.11 Multiplier circuit
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VCC VC OUT GND
10
(6) ON/OFF control circuit
Fig.12 shows the configuration of the ON/OFF control circuit. The ON/OFF control circuit consists of a comparator with hysteresis. To turn the IC from OFF mode to operating mode, pull up the ON/OFF pin voltage to 3.95V (typ.) or higher. On the other hand, to turn the IC from operating mode to OFF mode, pull down the ON/OFF pin to 2.80V (typ.) or lower. In the OFF mode, the reference (REF) voltage is cut off, and the CS pin and OUT pin go approximately 0V. IC consumption current during OFF mode is 200A (max.) which is much smaller than at an operating mode. The input current at ON/OFF pin is a very small value of 500nA. In the case that external signal is applied to ON/OFF pin, the ON/OFF pin voltage must not exceed the VCC pin voltage, even when start up or stop operation. If ON/OFF operation is not made by external signal, the ON/OFF pin is normally pulled up to Vcc pin through 10k to 1M. Then ON/OFF pin voltage goes to approximately Vcc voltage.
Rg1
9 8
C5
Rg2
7
Shottky diode
Fig.13 Output circuit
(8) Undervoltage lockout circuit
This IC contains an undervoltage lockout circuit to prevent malfunction when the Vcc voltage drops. When the Vcc voltage rises from 0V, this IC starts operation at 16.5V (typ.). If the Vcc voltage drops after the IC starts up, this IC stops operation at 8.9V(typ.). When IC stops operation by undervoltage lockout circuit, OUT pin and CS pin is kept low
(9) Compensation circuit for light load
If the output of multiplier and the input of current error amplifier do not have offset voltage, the input current to the converter is approximately zero under condition that the PFC converter operates in no load. But an actual multiplier and current error amplifier may have offset voltage. If the offset voltage is negative, the input current, which corresponds to the offset voltage, flows into the converter even when the PFC converter operates in no load. In this case, the PFC output voltage rises abnormally because of too much input current. To avoid these, this IC has an automatic offset correction circuit for light load. The output voltage of error amplifier is approximately 1.55V or higher in normal operation. If the output voltage drops below 1.55V, this circuit operates. If there is a negative offset voltage, the output voltage of error amplifier falls below 1.55V in the case that the PFC converter operates in no load or light load. Then, the offset voltage is corrected in the multiplier circuit. Because of this operation, even under no load or light load, the PFC output voltage does not rise abnormally, but is always kept stable. The amount of correction changes linearly according to the output of error amplifier, which can make operation stable. Fig.14 shows the outline of the effect of this circuit.
12
ON/OFF
REF circuit Output circuit 3.95/2.80V
Fig.12 ON/OFF control circuit
(7) Output circuit
As shown in Fig.13, VC pin (pin 9) is configured as the high power terminal, independent of the IC power terminal (VCC pin). This pin allows an independent drive resistance when the power MOSFET is ON and OFF. Suppose the drive resistance when ON and OFF are Rg (on) and Rg (off), Rg(on)=Rg1+Rg2 * * * * * (9) Rg(off)=Rg2 * * * * * (10) At standby, the OUT pin is kept Low. If the drain voltage of power MOSFET oscillates, a parasitic capacitance between gate and drain may swing the OUT pin (pin 8) of IC below 0V. If OUT pin voltage falls below -0.3V, a current may flow to the parasitic element in IC, whereby the IC may malfunction. In such a case, Schottky diode must be connected between OUT pin and GND so as not to allow a parasitic current to flow to IC. If VC pin is fed with a source which is independent of VCC pin, the voltage of VC pin must not exceed that of VCC pin even start up or stop operation.
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FA5502P/M
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Without compensation full load
AC line current
no-load offset current
0 1/2 of line frequency With compensation AC line current full load
t
result of compensation
no-load t 1/2 of line frequency
0
PFC output voltage
Without compensation
With compensation 0 PFC output power
Fig.14 Operation outline of compensation circuit for light load
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FA5502P/M
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Even after PFC starts up, Vcc may fall due to step changes of the load or inputs. To prevent the IC from stopping in those cases, the circuit shown in Fig.17 is effective to prolong the hold time of the Vcc voltage. After the PFC converter starts up, Vcc is supplied through C6. Therefore, you can prolong the hold time of Vcc by using a large capacity for C6.
9. Design advice
(1) Vcc circuit
Vcc voltage can be supplied from an auxiliary winding of the inductor. An example circuit is shown in Fig.15.
L D1
Vac R8
(sub) D3 Rs VCC FA5502
10
Co Q1
VCC
R8 D3
D4 sub
C5
7
C5
C6
Fig.17 Vcc circuit (2) In some case, the Vcc voltage cannot be supplied enough in light load condition. In this case, the circuit shown in Fig.18 may be effective to improve the Vcc. The appropriate value of C7 and R9 should be determined by evaluation in actual circuit because they depend on each circuit.
GND
Fig.15 Vcc circuit (1) In this circuit, R8 is a start up resistor. The start up resistor R8 should be satisfied the following formula in order to supply with at least 30A of IC start up current. R8 < 2 x Vac (min) - 17.5 30 x 10
-6
* * * * * (11)
VCC
R8 D3
C7 R9 sub
Note that this formula is a minimum condition for starting the IC. Practically, determine the value upon taking into account the start up time required for converter. The start up time must be determined upon measurement at actual circuit operation. In steady state, Vcc is supplied from the auxiliary winding (sub) of inductor. When the IC is just starting up, however, it takes time for the voltage from auxiliary winding to rise enough. The value of capacitor C5 connected to Vcc pin should be determined to prevent Vcc from falling below the OFF threshold voltage of UVLO during this period. The capacity of C5 should be determined by evaluation in the actual circuit because the time lag is different in each circuit.
Vcc UVLO ON UVLO OFF
C5
D5
Fig.18 Vcc circuit (3)
(2) Supplying Vcc from external power supply
If Vcc is not supplied from the auxiliary winding of inductor but from an external power supply, pay attention to the followings. * In order to start up the IC, Vcc must be above the ON threshold voltage VTHUON (17.5V (max.)) of undervoltage lockout circuit (UVLO). When starting up, apply at least this VTHUON. After starting up, the operation is available within the recommended range of 10 to 28V. * If a noise is applied to Vcc pin, it may cause malfunction. To avoid a noise, connect a capacitor near VCC pin even when Vcc is supplied from an external power supply. To prevent a malfunction, suppress the noise below about 0.6V. And, make sure there is no malfunction attributable to noise.
Vcc must not drop below UVLO OFF. Auxiliary winding voltage t
Fig.16 Vcc voltage at start up
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So that the voltage inputted to IDET pin will not be beyond -1V, whereby the overcurrent limiting circuit will not operate at a normal operation, calculate Rs by: RS Vin (min) 2 x Pin (max) [] * * * * * (15)
(3) Designing a boost converter
Fig.19 shows a basic circuit of boost converter used as an PFC converter. The following describes how to determine each values of the circuit.
L D
Vin
Q
Co
Vo
Where, Vin (min): Minimum AC input voltage [Vrms] Pin (max): Maximum input position [W] As a matter of fact, the peak current changes with switching ripple current contained in the inductor current, circuit efficiency, etc. Definitely determine it by evaluation on a actual circuit. (3-4) Smoothing capacitor PFC converter output contains ripple voltage of twice the line frequency as shown in Fig.21. Instantaneous value Vo(t) of output voltage is approximated by: Vo( t ) = Vo - Io x sin(20 x t ) * * * * * (16) 20 x Co
Rs
Fig.19 Boost converter circuit (3-1) Output voltage Set the output voltage of boost converter at least 10V higher than the peak value of maximum input voltage to ensure a stable operation. When it is used as PFC converter, the input voltage has a sinusoidal waveform. Therefore, set the output voltage Vo by: Vo 2 x Vin (max) + 10 [ V ] Vin (max) : Maximu AC input voltage [ Vrms] * * (12)
(3-2) Inductor When PFC converter operates in the continuous current mode, select an approximate inductance considering the ratio of inductor ripple current to the peak input current by: Vin2 Vo - 2 x Vin L x fs x Pin x Vo
Where, Io: Output current [A] 0 = 2f0 (f0: AC line frequency [Hz]) Co: Output smoothing capacitance [F] Therefore, output ripple voltage Vrp (p-p) is: Vrp = Io * * * * * (17) 0 x Co
(
)
* * * * * (13)
Where, Vin: AC input voltage [Vrms] : Ratio of ripple content to peak input current. (Set to approx. 0.2, see Fig.20) fs: Switching frequency [Hz] Pin: Maximum input power [W]
Using formula (17), determine the necessary value. The overvoltage limiting circuit of FA5502 monitors the instantaneous output voltage. Therefore, determine the capacitance of smoothing capacitor Co so that the instantaneous output voltage including the ripple at a normal operation will not reach the overvoltage limit.
Vrp Vo 2xfac
Inductor current
= Ir / Iac(peak ) Ir
Iac(peak) t
line current
Fig.21 Output ripple voltage
Fig.20 Outline of inductor and AC line current (3-3) Current detecting resistance Rs Rs is a resistor which allows to detect an inductor current to control the line current into sinusoidal. Because the threshold voltage for overcurrent limiting circuit is -1.1V (typ.), peak inductor current limit Ip is calculated by: Ip = 1 .1 [ A ] * * * * * (14) RS
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(6) Improvement of output voltage regulation
As stated in "9-(5)", the output voltage may change with input voltage or load current on the circuit in Fig.6 in "8-(2)", thereby causing a problem in some case. In such a case, the circuit in Fig.24 may improve the regulation.
Vo R13
5
(4) Output overvoltage at light load
A compensation circuit for light load is incorporated for preventing an overvoltage when light or no load. Though, according to the condition, this circuit may not compensate enough and overvoltage may occur. To prevent overvoltage, the following condition must be satisfied. - Noise filter resistor Rn connected to IDET pin (pin 16) must be below 27. - As shown in Fig.22, DC gain limiting resistor R10 for current error amplifier must not be connected between IFB pin (pin 1) and IIN- pin (pin 2).
VFB
R2 R3
C8
6
VINMUL Vr =1.55V(typ.)
C9
R5 C2 R10 C3
2 IIN-
R1
FA5502
1 IFB
Fig.24 ER.AMP circuit for improvement of regulation Voltage gainAv2 of this circuit is expressed by:
Fig.22 Prevention of overvoltage at light load
(5) Notes for setting the output voltage and overvoltage limit
In the actual circuit, the output voltage drops depending on the line voltage or load current. Therefore, the output voltage may be lower than the voltage calculated by expression (1) in "8-(2)". When setting the output voltage, sufficiently evaluate it on an actual circuit. On the circuit shown in Fig.6 in "8-(2)", the overvoltage setting is fixed at 1.058 times the output voltage setting. For setting the overvoltage independently of the output voltage setting, connect voltage divider additionally to OVP pin as shown in Fig.23. On the circuit in Fig.23, even if the voltage divider for setting the output voltage has troubled, the overvoltage limiting circuit operates properly, thereby preventing the output voltage from rising excessively.
Vo C1 R2 R4
6 5
A V2 =
1 + jC9 x R13 * * * (18) j((C8 + C9) + jC8 x C9 x R13 )R3
Optimum values depend on an each circuit. Referring the following relations or the example applied to "10 Example of application circuit", adjust the values on actual circuit. - Set the voltage gain Av2 at 100 or 120 Hz almost the same as before changing the compensation circuit. - Determine C8, C9 and R13 so as to satisfy the following relations. * Set fz determined by the following expression to several Hz to several ten Hz. fZ = 1 * * * * * (19) 2C9 x R13
VFB
* Set fp determined by the following expression so that the fp/fz ratio is about 10. fp =
MUL Vr =1.55V(typ.)
VIN- ER.AMP
1 2C x R13
C=
C8 x C9 * * * * * (20) C8 + C9
R3 R1
R12
4
OVP OVP.COMP F.F. Vp =1.058Vr(typ.)
*Example of values applied to "10 Example of application circuit" C8=0.033F, C9=0.15F, R13=330k, R3=100k (These values are given as references and not intended for guaranteeing the operation in any circuit.) In this circuit, not only the output voltage characteristics at a steady status but also transient response to line voltage and load current may change. Before determining the circuit values, evaluate sufficiently.
R11
Fig.23 Independent setting of OVP limit
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(9) Oscillator setting and maximum duty cycle
The maximum duty cycle is determined by forcing the OUT pin to be Low during the oscillator discharge period. The oscillator discharge period changes with RT and CT connected to CT pin. On a network of CT and RT providing the same oscillation frequency, the discharge period shortens and the maximum duty cycle increases by minimizing CT and maximizing RT. (See characteristics curve.) The maximum duty cycle may affect the input current waveform, particularly at zero crossing. Therefore, sufficiently test CT and RT before determining them. Too small CT could not give a stable oscillation on account of noise, etc. It should be 330pF or more according to the recommended condition.
(7) Prevention of intermittent switching of low frequency
An intermittent switching below 10 Hz may occur in some application. It may be avoided by the following methods. They are given as typical preventions of intermittent switching and may not be effective for certain circuits. They may also affect the characteristics of PFC converter. Sufficiently check the operation on a actual circuit. (7-1) Lowering the dc gain of voltage error amplifier Lower the dc gain of the voltage error amplifier. Concretely, reduce the resistance of R4 on the circuit in Fig.6 in "8-(2)". Note that, in this case, the line and load regulation will be lowerd. (7-2) Connection of Rofst Adjust the offset of the current error amplifier. Concretely, connect a resistor Rofst of 1M or higher between REF pin and IIN- pin as shown in Fig.25. Note that, in this case, the input current will be distorted and the power factor will be slightly lowered.
13 REF
(10) Npte in use of SYNC pin
If the external synchronizing signal is not a square waveform or if has a trapezoid shape, a differentiating circuit of RC network may not satisfy the waveform condition shown in Fig.3 in "8-(1)". In such a case, convert the external synchronizing signal into a square waveform by means of comparator or the like before inputting it to a differentiating circuit of RC network. (See "8-(1) Oscillator section".)
Rofst
FA5502
2 IIN-
R5 C3
C2
1 IFB
(11) Prevention of malfunction by noise
Noise applied to each pin may cause malfunction of IC. If noise causes malfunction, see the notes summarized below and confirm in actual circuit to prevent malfunction. Capacitor for noise suppressing should be connected as close to IC as possible so as to suppress noise effectively. (11-1) REF pin REF pin voltage is supplied to each components of IC as voltage source and reference voltage. A noise applied to this pin may cause a malfunction of IC. To suppress a malfunction by noise, connect a capacitor of 0.1 F or more between REF pin and GND. (11-2) IDET pin If a noise is applied to IDET pin which detects induvtor current, the overcurrent limiting circuit may suffer from a malfunction. In such a case, insert an RC filter at IDET pin. (11-3) OVP pin If a noise applied to OVP pin causes a malfunction, connect a noise suppressing capacitor between OVP and GND pins. (11-4) CT pin A noise applied to CT pin, which is an oscillator output, may disturb the oscillation frequency or OUT pulses. The wiring between oscillator timing capacitor CT and IC must be as short as possible so as to suppress the noise to CT pin. Pay utmost attention to
Fig.25 Connection of Rofst (7-3) Change of compensation network of voltage error amplifier Replace the compensation network connected to the voltage error amplifier with the circuit in Fig.24 in "9-(6)". Note that, in this case, the transient response may be different from that before the change.
(8) Improvement of operation around zero crossing
In some application, surge current may appear on the line current around zero crossing. This surge current may cause harmonic current especially in high order. In such a case, the following method may suppress this surge current. (8-1) Connection of Rofst As shown in Fig.25, connect resistor Rofst between REF pin and IIN- pin. Use a resistor of about 1M or higher. (8-2) Increase of Dmax Increase the maximum duty cycle. Concretely, select such a network of RT and CT for the same frequency that CT is a smaller and RT a larger. (See (9) Oscillator setting and maximum duty cycle.)
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FA5502P/M GND wiring so as not to generate a common impedance with other wires. (11-5) VCC pin A noise applied to VCC pin may cause a malfunction. To suppress this noise, connect a capacitor near VCC pin even if IC is energized by another power supply. Determine the capacitance so that the noise generated at VCC pin will be within about 0.6V . Then, make sure no malfunction occurs by noise.
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(13) Prevention of malfunction by negative voltage of each pin
IDET pin is so designed as to input a negative voltage. In the case of other pins, however, if large negative voltage is applied, parasitic elements in IC may operate and it may cause a malfunction. Pay attention so that the voltage applied to pins other than IDET pin will not be lower than -0.3V.
(12) Voltage rating of IDET pin
The voltage rating of IDET pin, which monitors an inductor current, is -10V. In case of a general boost circuit, a inrush current for charging the output smoothing capacitor Co flows at the instant when an AC input voltage is connected. This current may be by far greater than the input current at a normal operation. As a result, a voltage much higher than normal may be applied to IDET pin. Pay attention so that a voltage beyond the maximum voltage rating of -10V will not be applied to IDET pin even at an instant when an AC input voltage has been connected. If there are cases where a voltage higher than rating is applied to IDET pin, insert a limiting circuit for inrush current, or add a Zener diode as shown in Fig.26 or 27 to suppress the voltage applied to IDET pin.
L
D Co
ZD
Q
Rs
7
Rn
GND Cn
16
FA5502
IDET
Fig.26 IDET pin protection (1)
L
D Co
Q
Rs
7
Rn
ZD
GND Cn
16
FA5502
IDET
Fig.27 IDET pin protection (2)
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FA5502P/M
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D2-D5 ERD03-06 L1 1mH D1 YG962S6 Vout 385V 200W
10. Example of application circuit
F1 5A AC IN 85 - 264V C11 0.1F
L2
R8 240k C12 0.47 R7 240k Rg2 4.7 D6 Rs 0.22 R25 100k ERA81-004 0V Q1 2SK3520 C13 220
ON/OFF Vcc 18V
Cn 0.01
Rn 27
IDET
CT 330p RT 22k
CT
CREF 0.1
C4 0.15
R9 220k Rg1 390
VC
R16 270k R17 240k
SYNC REF ON/OFF CS
VCC
FA5502
IFB IIN- VDET OVP VFB VIN- GND OUT
Cv 100
R2 150k
R6 C3 2.7k 470p GND
C2 68p R5 10k
C1 0.15 C5 0.022
R4 470k
R3 33k
R1 1.5k
R18 2k
Note
This application circuit exemplifies the use of IC for your reference only. Parts tolerance, parts characteristics, influence of noise, etc. are not defined in this application circuit. When design an actual circuit for a product, you must determine parts tolerance, parts characteristics, influence of noise, etc. for safe and economical operation. Neither Fuji nor its agents shall be liable for any injury caused by any use of this circuit.
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